#ifndef __PWRMGNT_H
#define __PWRMGNT_H
/******************************************************************************
 *
 *                  POWER MANAGEMENT PERIPHERAL LIBRARY HEADER FILE
 *
 ******************************************************************************
 * FileName:        pwrmgnt.h
 * Dependencies:    See include below
 * Processor:       PIC24
 * Compiler:        MPLAB C30
 * Company:         Microchip Technology, Inc.
 *
 * Software License Agreement
 * The software supplied herewith by Microchip Technology Incorporated
 * (the “Company”) for its PICmicro® Microcontroller is intended and
 * supplied to you, the Company’s customer, for use solely and
 * exclusively on Microchip PICmicro Microcontroller products. The
 * software is owned by the Company and/or its supplier, and is
 * protected under applicable copyright laws. All rights are reserved.
 * Any use in violation of the foregoing restrictions may subject the
 * user to criminal sanctions under applicable laws, as well as to
 * civil liability for the breach of the terms and conditions of this
 * license.
 *
 * THIS SOFTWARE IS PROVIDED IN AN “AS IS” CONDITION. NO WARRANTIES,
 * WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED
 * TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
 * PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. THE COMPANY SHALL NOT,
 * IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL OR
 * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
 *
 *****************************************************************************/

#include "Generic.h"
#include "PIC24F_periph_features.h"

/* Source of Reset */
typedef enum
{
   POWER_ON_Reset,
   BURN_OUT_Reset,
   WATCHDOG_Reset,
   SOFTWARE_Reset,
   EXTERNAL_Reset,
   CFG_WORD_MISMATCH_Reset,
   ILLEGAL_INSTR_Reset,
   TRAP_Reset
}  RESET_SOURCE;

/* Source of Wake-Up */
typedef enum
{
   WAKEUP_SLEEP,
   WAKEUP_IDLE
}  WAKEUP_SOURCE;


/* List of SFRs for Oscillator Configuration */
/* This list contains the SFRs with default (POR) values to be used for configuring Oscaillator */
/* The user can modify this based on the requirement */

/*****************************************************************************/
/* OSCCON: OSCILLATOR CONTROL REGISTER Bit Configuration *********************/
/*****************************************************************************/
#define FRC_OSC                           0x0000
#define FRC_OSC_WITH_POSTSCALER_PLL       0x0001
#define PRIMARY_OSC                       0x0002
#define PRIMARY_OSC_WITH_PLL              0x0003
#define SECONDRY_OSC                      0x0004
#define LOW_POWER_RC                      0x0005
#define FRC_OSC_WITH_POSTSCALER           0x0007

/*****************************************************************************/
/* CLKDIV: CLOCK DIVIDER REGISTER Bit Configuration **************************/
/*****************************************************************************/
#define INTR_CLEAR_DOZEN_BIT              0x8000
#define INTR_NO_EFFECT_DOZEN              0x0000
#define INTR_EFFECT_MASK                  (~INTR_CLEAR_DOZEN_BIT)

#define PERI_CLK_RATIO_128                0x7000
#define PERI_CLK_RATIO_64                 0x6000
#define PERI_CLK_RATIO_32                 0x5000
#define PERI_CLK_RATIO_16                 0x4000
#define PERI_CLK_RATIO_8                  0x3000
#define PERI_CLK_RATIO_4                  0x2000
#define PERI_CLK_RATIO_2                  0x1000
#define PERI_CLK_RATIO_1                  0x0000
#define PERI_CLK_RATIO_MASK               (~PERI_CLK_RATIO_128)

#define PERI_CLK_RATIO_ENABLE             0x0800
#define PERI_CLK_RATIO_SET_1              0x0000
#define PERI_CLK_RATIO_ENBL_SET_MASK      (~0x0800)

#define FRC_POSTSCALER_SEL_256            0x0700
#define FRC_POSTSCALER_SEL_64             0x0600
#define FRC_POSTSCALER_SEL_32             0x0500
#define FRC_POSTSCALER_SEL_16             0x0400
#define FRC_POSTSCALER_SEL_8              0x0300
#define FRC_POSTSCALER_SEL_4              0x0200
#define FRC_POSTSCALER_SEL_2              0x0100
#define FRC_POSTSCALER_SEL_1              0x0000
#define FRC_POSTSCALER_SEL_MASK           (~FRC_POSTSCALER_SEL_256)


/*****************************************************************************/
/* OSCTUN :  FRC Oscillator Tune Register Bit Configuration ******************/
/*****************************************************************************/

/******************************************************************************
0b011111 = Maximum frequency deviation
0b011110 =
.
.
.
0b000001 =
0b000000 = Center frequency, oscillator is running at factory calibrated frequency
0b111111 =
.
.
.
0b100001 =
0b100000 = Minimum frequency deviation
*/

#define OSC_TUNE_REG_VAL                  0x0000 /* Center frequency */

#ifdef _PWRMGNT
/******************************************************************************
 * Function:        RESET_SOURCE PwrMgnt_ResetSource(void)
 *
 * PreCondition:    None   
 *
 * Input:           None
 *
 * Output:          RESET_SOURCE : Enum value representing the source of reset
 *
 * Side Effects:    None
 *
 * Overview:        This function returns the source of reset.
 *
 * Note:            None
 *****************************************************************************/
extern RESET_SOURCE PwrMgnt_ResetSource(void) __attribute__ ((section (".libperi")));

/******************************************************************************
 * Function:        WAKEUP_SOURCE PwrMgnt_WakeupSource(void)
 *
 * PreCondition:    None   
 *
 * Input:           None
 *
 * Output:          WAKEUP_SOURCE : Enum value representing the source of wakeup
 *
 * Side Effects:    None
 *
 * Overview:        This function returns the source of wakeup.
 *
 * Note:            None
 *****************************************************************************/
extern WAKEUP_SOURCE PwrMgnt_WakeupSource(void) __attribute__ ((section (".libperi")));


/******************************************************************************
 * Function:        BOOL PwrMgnt_OscSel(UINT16 new_oscsel)
 *
 * PreCondition:    None   
 *
 * Input:           UINT16 - This parameter is the value of the new 
 *                                      oscillator to be selected.
 *                  
 * Output:          new_oscsel - TRUE : If successfully changed new  oscillator select 
 *                                bits.
 *                         FALSE: If 'FCKSM1 = 1' or new oscillator value is same 
 *                                as old oscillator value or PLL is not locked.
 *
 * Side Effects:    Global interrupts are disabled while the oscillator is being 
 *                  switched.
 *
 * Overview:        This function should be used to select the appropriate      
 *                  oscillator.
 *
 * Note:            None
 *****************************************************************************/
extern BOOL PwrMgnt_OscSel(UINT16 new_oscsel) __attribute__ ((section (".libperi")));

/******************************************************************************
 * Function:       void PwrMgnt_ClkDiv_Sel(UINT16 clk_div_config)
 *
 * PreCondition:    None   
 *
 * Input:           clk_div_config - This parameter is the value of the CLKDIV register
 *
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        
 *
 * Note:            None
 *****************************************************************************/
extern void PwrMgnt_ClkDiv_Sel(UINT16 clk_div_config) __attribute__ ((section (".libperi")));

/******************************************************************************
 * Macro:           mPWRMGNT_RecoverOnInterrupt
 *
 * PreCondition:    None
 *
 * Input:           polarity 1 = Interrupts clear the DOZEN bit and reset the  
 *                               CPU peripheral clock ratio to 1:1
 *                           0 = Interrupts have no effect on the DOZEN bit
 *
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        sets ROI bitfield polarity
 *                  
 * Note:            
 *****************************************************************************/
#define mPWRMGNT_RecoverOnInterrupt(polarity)   (CLKDIVbits.ROI= polarity )

/******************************************************************************
 * Macro:           mPWRMGNT_PeriClkRatioSelect
 *
 * PreCondition:    None
 *
 * Input:           ratio = n (n=0 to n=7)
 *                         
 *
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        DOZE2:DOZE0: CPU Peripheral Clock Ratio Select bits
 *                               in DOZE mode
 *                  0b111 = 1:128
 *                  0b110 = 1:64
 *                  0b101 = 1:32
 *                  0b100 = 1:16
 *                  0b011 = 1:8
 *                  0b010 = 1:4
 *                  0b001 = 1:2
 *                  0b000 = 1:1
 *
 * Note:            
 *****************************************************************************/
#define mPWRMGNT_PeriClkRatioSelect(ratio)   (CLKDIVbits.DOZE= ratio)

/******************************************************************************
 * Macro:           mPWRMGNT_FRCPostScalerSelect
 *
 * PreCondition:    None
 *
 * Input:           postscaler = n (n=0 to n=7)
 *                         
 *
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        RCDIV2:RCDIV0: CPU Peripheral Clock Ratio Select bits
 *                  0b111 = 31.25 kHz (divide by 256)
 *                  0b110 = 125 kHz (divide by 64)
 *                  0b101 = 250 kHz (divide by 32)
 *                  0b100 = 500 kHz (divide by 16)
 *                  0b011 = 1 MHz (divide by 8)
 *                  0b010 = 2 MHz (divide by 4)
 *                  0b001 = 4 MHz (divide by 2)
 *                  0b000 = 8 MHz (divide by 1)
 *
 * Note:            
 *****************************************************************************/
#define mPWRMGNT_FRCPostScalerSelect(postscaler)   (CLKDIVbits.RCDIV= postscaler)

/******************************************************************************
 * Macro:           mPWRMGNT_FRCOscTuningBits
 *
 * PreCondition:    None
 *
 * Input:           0b011111 = Maximum frequency deviation                      
 *                  0b011110 =                                                  
 *                  .                                                           
 *                  .                                                           
 *                  .                                                           
 *                  0b000001 =                                                  
 *                  0b000000 = Center frequency, oscillator is running at factory
 *                             calibrated frequency
 *                  0b111111 =                                                  
 *                  .                                                           
 *                  .                                                           
 *                  .                                                           
 *                  0b100001 =                                                  
 *                  0b100000 = Minimum frequency deviation                      
 * Output:          None
 *
 * Side Effects:    None
 *
 * Overview:        
 *
 * Note:            
 *****************************************************************************/
#define mPWRMGNT_FRCOscTuningBits(bits)   (OSCTUN= bits)

/******************************************************************************
 * Macro:           mPWRMGNT_GetPLL_LockStatus
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          Returns  1 = PLL module is in lock or PLL module start-up 
 *                               timer is satisfied
 *                           0 = PLL module is out of lock, PLL start-up timer 
 *                               is running or PLL is disabled
 *
 * Side Effects:    None
 *
 * Overview:        
 *
 * Note:            
 *****************************************************************************/
#define mPWRMGNT_GetPLL_LockStatus()   (OSCCONbits.LOCK)

/******************************************************************************
 * Macro:           mPWRMGNT_GetClkFailDetectBit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          Returns  1 = FSCM has detected a clock failure
 *                           0 = No clock failure has been detected
 *
 * Side Effects:    None
 *
 * Overview:        
 *
 * Note:            
 *****************************************************************************/
#define mPWRMGNT_GetClkFailDetectBit()   (OSCCONbits.CF)

/******************************************************************************
 * Macro:           mPWRMGNT_GotoSleepMode
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        Device goes into sleep mode. Device will will wake on any  
 *                  of the  following condition satisfied :
 *                  - On any interrupt source that is individually enabled
 *                  - On any form of device Reset
 *                  - On a WDT time-out
 *
 * Note:            
 *****************************************************************************/
#define mPWRMGNT_GotoSleepMode()   (asm("PWRSAV #0"))

/******************************************************************************
 * Macro:           mPWRMGNT_GotoIdleMode
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        Device goes into idle mode. Device will will wake on any  
 *                  of the  following condition satisfied :
 *                  - On any interrupt source that is individually enabled
 *                  - On any form of device Reset
 *                  - On a WDT time-out
 *
 * Note:            
 *****************************************************************************/
#define mPWRMGNT_GotoIdleMode()   (asm("PWRSAV #1"))

/******************************************************************************
 * Macro:           mPWRMGNT_Clear_PORbit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        This macro clear PowerOn Reset bit
 *
 * Note:            This will not clear BOR bit , to clear BOR bit call the    
 *                  respective macro
 *****************************************************************************/
#define mPWRMGNT_Clear_PORbit()   (RCONbits.POR = 0)

/******************************************************************************
 * Macro:           mPWRMGNT_Clear_BORbit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        This macro clear Burn Out Reset bit
 *
 * Note:
 *****************************************************************************/
#define mPWRMGNT_Clear_BORbit()   (RCONbits.BOR = 0)

/******************************************************************************
 * Macro:           mPWRMGNT_Clear_WDTObit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        This macro clear Watch Dog Time Out Reset bit
 *
 * Note:
 *****************************************************************************/
#define mPWRMGNT_Clear_WDTObit()   (RCONbits.WDTO = 0)

/******************************************************************************
 * Macro:           mPWRMGNT_Clear_SWRbit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        This macro clear Software Reset bit
 *
 * Note:
 *****************************************************************************/
#define mPWRMGNT_Clear_SWRbit()   (RCONbits.SWR = 0)

/******************************************************************************
 * Macro:           mPWRMGNT_Clear_EXTRbit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        This macro clear External Reset bit
 *
 * Note:
 *****************************************************************************/
#define mPWRMGNT_Clear_EXTRbit()   (RCONbits.EXTR = 0)

/******************************************************************************
 * Macro:           mPWRMGNT_Clear_CMbit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        This macro clear Configuration Word Mismatch Reset bit
 *
 * Note:
 *****************************************************************************/
#define mPWRMGNT_Clear_CMbit()   (RCONbits.CM = 0)

/******************************************************************************
 * Macro:           mPWRMGNT_Clear_IOPUWRbit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        This macro clear Illegal Instruction Reset bit
 *
 * Note:
 *****************************************************************************/
#define mPWRMGNT_Clear_IOPUWRbit()   (RCONbits.IOPUWR = 0)

/******************************************************************************
 * Macro:           mPWRMGNT_Clear_TRAPRbit
 *
 * PreCondition:    None
 *
 * Input:           None         
 *
 * Output:          
 *
 * Side Effects:    None
 *
 * Overview:        This macro clear trap Reset bit
 *
 * Note:
 *****************************************************************************/
#define mPWRMGNT_Clear_TRAPRbit()   (RCONbits.TRAPR = 0)


#endif /* _PWRMGNT */

#endif  /* __PWRMGNT_H */
